NEC V850E/PH2, User Manual

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Chapter 11 16-bit Timer/Event Counter T
User’s Manual U16580EE3V1UD00
11.3 Configuration
Timer T is configured of the following hardware.
Note: Alternate-function pins
Remark: n = 0, 1
Table 11-1: Timer T Configuration
Item Configuration
Counter 16-bit counter
Registers TMTn capture/compare registers 0, 1 (TTnCCR0, TTnCCR1)
TMTn counter read buffer register (TTnCNT)
TMTn counter write buffer register (TTnTCW)
TTnCCR0 buffer register, TTnCCR1 buffer register
Timer input pins
7 (TITn0, TITn1, TEVTTn, TTRGTn, TENCTn0, TENCTn1, TECRTn)
Note
Timer output pins
2 (TOTn0, TOTn1)
Note
Timer input signals
Timer output signals TTnEQC0, TTnEQC1
Control registers TMTn control registers 0, 1 (TTnCTL0 to TTnCTL2)
TMTn I/O control registers 0 to 2 (TTnIOC0 to TTnIOC3)
TMTn option registers 0, 1 (TTnOPT0 to TTnOPT2)
Interrupts Compare match interrupt (INTTTnCC0, INTTTnCC1)
Overflow interrupt (INTTTnOV)
Encoder clear interrupt (INTTTnEC)