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Chapter 11
16-bit Timer/Event Counter T
User’s Manual U16580EE3V1UD00
11.6.3 External trigger pulse output mode
When, in the external trigger pulse mode, the duty is set to the TTnCCR1 register, the cycle is set to the
TTnCCR0 register, and TTnCE = 1 is set, external trigger input (TTRGTn pin) wait results, with the
counter remaining stopped at FFFFH. Upon detection of the valid edge of external trigger input
(TTRGTn pin), or when the TTnEST bit of the TTnCTL1 register is set, count up starts. An external
trigger pulse is output from pin TOTn1, and toggle output is performed from pin TOTn0 upon a match
with the TTnCCR0 register. Moreover, during the count operation, upon a match between the counter
and the TTnCCR0 register, a compare match interrupt (INTTTnCC0) is output, and upon a match
between the counter and TTnCCR1 register, a compare match interrupt (INTTTnCC1) is output.
The TTnCCR0 and TTnCCR1 registers can be rewritten during count operation. Compare register
reload is performed at the timing when the counter value and the TTnCCR0 register match. However,
when write access to the TTnCCR1 register is performed, the next reload timing becomes valid, so that
even if wishing to rewrite only the value of the TTnCCR0 register, write the same value to the TTnCCR1
register. In this case, reload is not performed even if only the TTnCCR0 register is rewritten.
If, during operation in the external trigger pulse output mode, the external trigger (TTRGTn pin) edge is
detected several times, or if the TTnEST bit of the TTnCTL1 register is set (to 1), the counter is cleared
and count up is resumed. Moreover, if at this time, the TOTn1 pin is in the low level status, the TOTn1
pin output becomes high level when an external trigger is input. If the TOTn1 pin is in the high level
status, it remains high level even if external trigger input occurs.
In the external trigger pulse output mode, the TTnCCR0 and TTnCCR1 registers have their function
fixed as compare registers, so the capture function cannot be used.
Caution:
In the external trigger pulse output mode, the external event clock input (TEVTTn) is
prohibited (TTnCTL1.TTnEEE = 0).
Remark:
n = 0, 1
Summary of Contents for V850E/PH2
Page 6: ...6 Preface User s Manual U16580EE3V1UD00...
Page 16: ...16 User s Manual U16580EE3V1UD00...
Page 28: ...28 User s Manual U16580EE3V1UD00...
Page 32: ...32 User s Manual U16580EE3V1UD00...
Page 84: ...84 Chapter 2 Pin Functions User s Manual U16580EE3V1UD00 MEMO...
Page 144: ...144 Chapter 3 CPU Functions User s Manual U16580EE3V1UD00 MEMO...
Page 192: ...192 Chapter 5 Memory Access Control Function PD70F3187 only User s Manual U16580EE3V1UD00 MEMO...
Page 312: ...312 Chapter 9 16 Bit Timer Event Counter P User s Manual U16580EE3V1UD00 MEMO...
Page 534: ...534 Chapter 11 16 bit Timer Event Counter T User s Manual U16580EE3V1UD00...
Page 969: ...969 Chapter 20 Port Functions User s Manual U16580EE3V1UD00 MEMO...
Page 970: ...970 Chapter 20 Port Functions User s Manual U16580EE3V1UD00...
Page 976: ...976 Chapter 22 Internal RAM Parity Check Function User s Manual U16580EE3V1UD00 MEMO...
Page 984: ...984 Chapter 23 On Chip Debug Function OCD User s Manual U16580EE3V1UD00 MEMO...
Page 1006: ...1006 Chapter 24 Flash Memory User s Manual U16580EE3V1UD00 MEMO...
Page 1036: ...1036 Chapter 27 Recommended Soldering Conditions User s Manual U16580EE3V1UD00 MEMO...
Page 1046: ...1046 Appendix A Index User s Manual U16580EE3V1UD00 MEMO...
Page 1052: ...1052 User s Manual U16580EE3V1UD00...
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