NEC V850E/PH2, User Manual

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Chapter 11 16-bit Timer/Event Counter T
User’s Manual U16580EE3V1UD00
11.6.8 Triangular wave PWM mode
In the triangular wave PWM mode, similarly to in the PWM mode, when the duty is set to the TTnCCR1
register, the cycle is set to the TTnCCR0 register, and TTnCE = 1 is set, variable duty and cycle type
triangular wave PWM output is performed from pin TOTn1. The TOTn0 pin is toggle output upon a
match with the TTnCCR0 buffer register and upon counter underflow. Upon a match between the
counter and TTnCCR0 register during count operation, a compare match interrupt (INTTTnCC0) is
output, and upon a match between the counter and TTnCCR1 register, a compare match interrupt
(INTTTnCC1) is output. Moreover, upon counter underflow, an overflow interrupt (INTTTnOV) is output.
The TTnCCR0 and TTnCCR1 registers can be rewritten during count operation. Compare register
reload occurs upon a match between the counter value and the TTnCCR0 buffer register. However,
since the next reload timing becomes valid when the TTnCCR1 register is written to, write the same
value to the TTnCCR1 register even when wishing to rewrite only the value of the TTnCCR0 register.
Reloading is not performed if only the TTnCCR0 register is rewritten. The reload timing is the underflow
timing.
In the triangular wave PWM mode, the TTnCCR0 and TTnCCR1 registers have their function fixed as
compare registers, so the capture function cannot be used.
Remark: In the triangular wave PWM mode, set the TTnCCR0 register to a value of 0
≤
TTnCCR0
≤
FFFEH.