NEC V850E/PH2, User Manual, Page: 842 / 1053

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Chapter 18 AFCAN Controller
User’s Manual U16580EE3V1UD00
Figure 18-37: Message buffer initialization
Caution 1. Before a message buffer is initialized, the RDY bit must be cleared.
2. Make the following settings for message buffers not used by the application.
• Clear the RDY, TRQ, and DN bits of the CnMCTRLm register to 0.
• Clear the MA0 bit of the CnMCONFm register to 0.
<~Reference>Figure 18-38 shows the processing for a receive message buffer (MT[2:0] bits of
CnMCONFm register = 001B to 101B).
START
Set
CnMCONFm register
END
RDY = 1?
No
Yes
Clear RDY bit
RDY = 0?
Set
CnMIDHm register,
CnMIDLm register
Transmit message buffer?
Clear
CnMDATAm register
Set
CnMCTRLm register
Set RDY bit
Set
CnMDLCm register
No
No
Yes
Yes
START
Set
CnMCONFm register
END
RDY = 1?
No
Yes
Clear RDY bit
RDY = 0?
Set
CnMIDHm register,
CnMIDLm register
Transmit message buffer?
Clear
CnMDATAm register
Set
CnMCTRLm register
Set RDY bit
Set
CnMDLCm register
No
No
Yes
Yes