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Chapter 18
AFCAN Controller
User’s Manual U16580EE3V1UD00
18.3 Functions
18.3.1 Determining bus priority
(1)
When a node starts transmission:
•
During bus idle, the node that output data first transmits the data.
(2)
When more than one node starts transmission:
•
The node that consecutively outputs the dominant level for the longest from the first bit of the arbitra-
tion field has the bus priority (if a dominant level and a recessive level are simultaneously transmit-
ted, the dominant level is taken as the bus value).
•
The transmitting node compares its output arbitration field and the data level on the bus.
(3)
Priority of data frame and remote frame
•
When a data frame and a remote frame are on the bus, the data frame has priority because its RTR
bit, the last bit in the arbitration field, carries a dominant level.
Remark:
If the extended-format data frame and the standard-format remote frame conflict on the bus
(if ID28 to ID18 of both of them are the same), the standard-format remote frame takes pri-
ority.
18.3.2 Bit
stuffing
Bit stuffing is used to establish synchronization by appending 1 bit of inverted-level data if the same
level continues for 5 bits, in order to prevent a burst error.
Table 18-9:
Determining bus priority
Level match
Continuous transmission
Level mismatch
Stops transmission at the bit where mismatch is detected
and starts reception at the following bit
Table 18-10:
Bit stuffing
Transmission
During the transmission of a data frame or remote frame, when the
same level continues for 5 bits in the data between the start of
frame and the ACK field, 1 inverted-level bit of data is inserted
before the following bit.
Reception
During the reception of a data frame or remote frame, when the
same level continues for 5 bits in the data between the start of
frame and the ACK field, reception is continued after deleting the
next bit.
Summary of Contents for V850E/PH2
Page 6: ...6 Preface User s Manual U16580EE3V1UD00...
Page 16: ...16 User s Manual U16580EE3V1UD00...
Page 28: ...28 User s Manual U16580EE3V1UD00...
Page 32: ...32 User s Manual U16580EE3V1UD00...
Page 84: ...84 Chapter 2 Pin Functions User s Manual U16580EE3V1UD00 MEMO...
Page 144: ...144 Chapter 3 CPU Functions User s Manual U16580EE3V1UD00 MEMO...
Page 192: ...192 Chapter 5 Memory Access Control Function PD70F3187 only User s Manual U16580EE3V1UD00 MEMO...
Page 312: ...312 Chapter 9 16 Bit Timer Event Counter P User s Manual U16580EE3V1UD00 MEMO...
Page 534: ...534 Chapter 11 16 bit Timer Event Counter T User s Manual U16580EE3V1UD00...
Page 969: ...969 Chapter 20 Port Functions User s Manual U16580EE3V1UD00 MEMO...
Page 970: ...970 Chapter 20 Port Functions User s Manual U16580EE3V1UD00...
Page 976: ...976 Chapter 22 Internal RAM Parity Check Function User s Manual U16580EE3V1UD00 MEMO...
Page 984: ...984 Chapter 23 On Chip Debug Function OCD User s Manual U16580EE3V1UD00 MEMO...
Page 1006: ...1006 Chapter 24 Flash Memory User s Manual U16580EE3V1UD00 MEMO...
Page 1036: ...1036 Chapter 27 Recommended Soldering Conditions User s Manual U16580EE3V1UD00 MEMO...
Page 1046: ...1046 Appendix A Index User s Manual U16580EE3V1UD00 MEMO...
Page 1052: ...1052 User s Manual U16580EE3V1UD00...
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