NEC V850E/PH2, User Manual

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Chapter 15 Asynchronous Serial Interface C (UARTC)
User’s Manual U16580EE3V1UD00
(4) UARTCn option control register 0 (UCnOPT0)
The UCnOPT0 register is an 8-bit register that controls the serial transfer operation of the
UARTCn register.
This register can be read or written in 8-bit or 1-bit units.
Reset input sets this register to 14H.
Figure 15-5: UARTCn Option Control Register 0 (UCnOPT0) (1/2)
After reset: 14H R/W Address: UC0OPT0 FFFFFA03H,
UC1OPT0 FFFFFA23H
7 6 5 4 3 2 1 0
UCnOPT0 UCnSRF UCnSRT UCnSTT UCnSLS2 UCnSLS1 UCnSLS0 UCnTDL UCnRDL
(n = 0, 1)
UCnSRF SBF Reception Flag
0 When UCnPWR of UCnCTL0 register = 0 and UCnRXE of UCnCTL0
register = 0 are set. Also upon normal end of SBF reception.
1 During SBF reception
• SBF (Sync Brake Field) reception is judged during LIN communication.
• The UCnSRF bit is held high when a SBF reception error occurs, and then SBF
reception is started again.
UCnSRT SBF Reception Trigger
0 –
1 SBF reception trigger
• This is the SBF reception trigger bit during LIN communication, and when read, “0” is
always read. For SBF reception, set the UCnSRT bit (to 1) to enable reception.
• Set the UCnSRT bit after setting the UCnPWR bit of the UCnCTL0 register to 1 and
the UCnRXE bit of the UCnCTL0 register to 1.
UCnSTT SBF Transmission Trigger
0 –
1 SBF transmission trigger
• This is the SBF transmission trigger bit during LIN communication, and when read, “0”
is always read.
• Set the UCnSRT bit after setting the UCnPWR bit of the UCnCTL0 register to 1 and
the UCnRXE bit of the UCnCTL0 register to 1.