MIPS MIPS32 74K Series, Programming Manual

Page: 59 / 156

Programming the 74K™ core in user mode
59 Programming the MIPS32® 74K™ Core Family, Revision 02.14
4.5.2 Branch delay slot
It’s a feature of the MIPS architecture that it always attempts to execute the instruction immediately following a
branch. The rationale for this is that it’s extremely difficult to fetch the branch target quickly enough to avoid a delay,
so the extra instruction runs “for free”...
Most of the time, the compiler deals well with this single delay slot. MIPS low-level programmers find it odd at first,
but you get used to it!
4.6 Tuning floating-point
It seemed to make more sense to put this information into the FPU chapter: read from Section 6.5 “FPU pipeline and
instruction timing” .