IC-Module for EtherNet/IP
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The first byte returns the status. If it is set to "0", the Master then
indicates that it cannot return any current status information since
there was no previous operation (this is usually the response to the
very first block transmission). A "1" indicates the successful
completion of the previous transmission. In the case of a 2, the
module sends the error code of an error in the subsequent byte,
which occurred during the previous block transmission. The possible
error codes are listed at the end of this subsection.
Writing 2 bytes (Word)
This access type basically proceeds as when writing 1 byte. It differs
in the following points:
– Instead of a mask byte, the second byte of the 16-bit wide user data is
transmitted with the data block. Access to individual bits in the target
register is not possible with this access type.
– The 16-bit wide register content to be written must be prepared by the
Master in such a way that the lower-value byte is transmitted as the s
4th byte and the higher-value byte is transmitted as the s 5th byte
("Little-Endian" or "Intel format").
Transmission block with fixed length
Command
code
(1 byte)
Address area
(2 bytes)
Data area
(2 byte)
Description
0x04
0x0000-0xFFFF
0x0000-0xFFFF
WRITE_WORD
0x00
0xXXXX
0xXXXX
NO_OPERATION*
The status response has the same structure and meaning as write access with 1 byte
Writing more thans 2 bytes
with one access (bulk-write)
This access type is suitable for larger volumes of data. The number
of target registers to be written and start address are transmitted with
the first transmission block. As with the previous access types, the
first transmission block also has a fixed length of 5 bytes here. After
this block with metadata, the user data follows in a separate
transmission block with variable length. The maximum permitted
number of target registers to be written depends on the target area: A
maximum of 128 registers (each 16-bit = 1 word) are permitted for
writing to the SSC input register area. A maximum of 16 registers per
block is to be written for all other target areas.
Components
