Kunbus LP0016R02, User Manual

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IC-Module for EtherNet/IP
68 / 137
0x0018 Configure SPI mode
In this memory register you have the option, Clock and data level for
the SPI interface to set
This setting is only used in the SPI slave mode. In SSC Master Mode
the SPI Controller always uses setting 4: "lagging edge, CLK high,
MSB first" (see also SPI - Synchronous serial interface [
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28])
Modbus Register 0x0018
Value Range 0x0001-0x0004
Default Value 4
Number of bytes avail-
able 1
Permanently stored Yes
Access Read/Write
Meaning
0x0001 Leading edge
(CPHA=0, CLK low (CPOL=0), MSB first
0x0002 Leading edge
(CPHA=0, CLK high (CPOL=1), MSB first
0x0003 Lagging edge
(CPHA=1, CLK low (CPOL=0), MSB first
0x0004 Lagging edge
(CPHA=1, CLK high (CPOL=1), MSB first
0x0019 Current configuration
of the SPI controller
In this memory register you will find information about the current
configuration of the clock and data level of the SPI controller.
Modbus Register 0x0019
Value Range 0x0000-0x0004
Number of bytes avail-
able 2
Permanently stored No
Access Read Only
Meaning
0x0000 SSC/SPI deactivated
0x0001 Leading edge
(CPHA=0, CLK low (CPOL=0), MSB first
0x0002 Leading edge
(CPHA=0, CLK high (CPOL=1), MSB first
0x0003 Lagging edge
(CPHA=1, CLK low (CPOL=0), MSB first
0x0004 Lagging edge
(CPHA=1, CLK high (CPOL=1), MSB first
Memory Register