IDT Configuration Registers
PES24N3A User Manual
9 - 54
April 10, 2008
Notes
GPIOFUNC - General Purpose I/O Control Function (0x418)
GPIOCFG - General Purpose I/O Configuration (0x41C)
GPIOD - General Purpose I/O Data (0x420)
SMBUSSTS - SMBus Status (0x424)
Bit
Field
Field
Name
Type
Default
Value
Description
15:0
GPIOFUNC
RW
0x0
Sticky
GPIO Function.
Each bit in this field controls the corre-
sponding GPIO pin. When set to a one, the corresponding
GPIO pin operates as the alternate function as defined in
Table 5.1 of Chapter 5. When a bit is cleared to a zero, the
corresponding GPIO pin operates as a general purpose I/O
pin.
31:16
Reserved
RO
0x0
Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
15:0
GPIOCFG
RW
0x0
Sticky
GPIO Configuration.
Each bit in this field controls the cor-
responding GPIO pin. When a bit is configured as a general
purpose I/O pin and the corresponding bit in this field is set,
then the pin is configured as a GPIO output. When a bit is
configured as a general purpose I/O pin and the corre-
sponding bit in this field is zero, then the pin is configured as
an input. When the pin is configured as an alternate func-
tion, the behavior of the pin is defined by the alternate func-
tion.
31:16
Reserved
RO
0x0
Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
15:0
GPIOD
RW
HWINIT
Sticky
GPIO Data.
Each bit in this field controls the corresponding
GPIO pin. Reading this field returns the current value of
each GPIO pin regardless of GPIO pin mode (i.e., alternate
function or GPIO pin). Writing a value to this field causes the
corresponding pins which are configured as GPIO outputs to
change state to the value written.
31:16
Reserved
RO
0x0
Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
0
Reserved
RO
0x0
Reserved field.
7:1
SSMBADDR
RO
HWINIT
Slave SMBus Address.
This field contains the SMBus
address assigned to the slave SMBus interface.
8
Reserved
RO
0x0
Reserved field.
15:9
MSMBADDR
RO
HWINIT
Master SMBus Address.
This field contains the SMBus
address assigned to the master SMBus interface.
23:16
Reserved
RO
0x0
Reserved field.
Summary of Contents for 89HPES24N3A
Page 10: ...IDT Table of Contents PES24N3A User Manual iv April 10 2008 Notes...
Page 12: ...IDT List of Tables PES24N3A User Manual vi April 10 2008 Notes...
Page 14: ...IDT List of Figures PES24N3A User Manual viii April 10 2008 Notes...
Page 18: ...IDT Register List PES24N3A User Manual xii April 10 2008 Notes...
Page 64: ...IDT Link Operation PES24N3A User Manual 4 8 April 10 2008 Notes...
Page 88: ...IDT Power Management PES24N3A User Manual 7 4 April 10 2008 Notes...
Page 160: ...IDT Configuration Registers PES24N3A User Manual 9 66 April 10 2008 Notes...