IDT 89HPES24N3A, User Manual

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IDT PES24N3A Device Overview
PES24N3A User Manual 1 - 2 April 10, 2008
Notes ‹
Reliability, Availability, and Serviceability (RAS) Features
– Supports ECRC and Advanced Error Reporting
– Internal end-to-end parity protection on all TLPs ensures data integrity even in systems that do
not implement end-to-end CRC (ECRC)
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC and server motherboards
‹
Power Management
– Utilizes advanced low-power design techniques to achieve low typical power consumption
– Supports PCI Power Management Interface specification (PCI-PM 1.1)
• Supports device power management states: D0, D3
hot
and D3
cold
– Unused SerDes are disabled
‹
Testability and Debug Features
– Built in Pseudo-Random Bit Stream (PRBS) generator
– Ability to read and write any internal register via the SMBus
– Ability to bypass link training and force any link into any mode
– Provides statistics and performance counters
‹
Eight General Purpose Input/Output Pins
– Each pin may be individually configured as an input or output
– Each pin may be individually configured as an interrupt input
– Some pins have selectable alternate functions
‹ Packaged in 27x27mm 420 ball BGA with 1mm ball spacing