IDT 89HPES24N3A, User Manual

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IDT Configuration Registers
PES24N3A User Manual 9 - 44 April 10, 2008
Notes
PVCCAP1- Port VC Capability 1 (0x204)
PVCCAP2 - Port VC Capability 2 (0x208)
Bit
Field
Field
Name
Type
Default
Value
Description
2:0 EVCCNT RO 0x0 Extended VC Count. The value 0x0 indicates only imple-
mentation of the default VC.
3 Reserved RO 0x0 Reserved field.
6:4 LPEVCCNT RO 0x0 Low Priority Extended VC Count. The value of 0x0 indi-
cates only implementation of the default VC.
7 Reserved RO 0x0 Reserved field.
9:8 REFCLK RO 0x0 Reference Clock. WRR is not implemented.
11:10 PATBLSIZ RO Upstream:
0x2
Downstream:
0x0
Port Arbitration Table Entry Size. This field indicates the
size of the port arbitration table in the device. For the
upstream port, the is set to 0x2 to indicate a table with 4-bit
entries. For downstream ports, this value is set to 0x0.
0x0 - (bit1) Port arbitration table is 1-bit
0x1 -(bit2) Port arbitration table is 2-bits
0x2 -(bit4) Port arbitration table is 4-bits
0x3 -(bit8) Port arbitration table is 8-bits
31:12 Reserved RO 0x0 Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
7:0 VCARBCAP RO 0x0 VC Arbitration Capability. This field indicates the type of
VC arbitration that is supported by the port for the low prior-
ity VC group.This field is valid for all ports that report a low
priority extended VC count greater than zero
Each bit in this field corresponds to a VC arbitration capabil-
ity.
bit 0 - hardware fixed arbitration (i.e., round robin)
bit 1 - weighted round robin (WRR) with 32 phases
bit 2 - weighted round robin (WRR) with 64 phases
bit 3 - weighted round robin (WRR) with 128 phases
bits 4 through 7 - reserved
23:8 Reserved RO 0x0 Reserved field.
31:24 VCATBLOFF RO 0x0 VC Arbitration Table Offset. This field contains the offset
of the VC arbitration table from the base address of the Vir-
tual Channel Capability structure in double quad words (16
bytes). The value of zero indicates that the VC arbitration
table is not present.