Hitachi H8S/2645, Hardware Manual

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23.4.4 Timing of On-Chip Supporting Modules
Table 23-7 lists the timing of on-chip supporting modules.
Table 23-7 Timing of On-Chip Supporting Modules
Condition : V
CC
= PWMV
CC
= 4.5 V to 5.5 V, LPV
CC
= 4.5 V to 5.5 V, AV
CC
= 4.5 V to 5.5 V,
V
ref
= 4.5 V to AV
CC
, V
SS
= PWMV
SS
= PLLV
SS
= AV
SS
= 0 V, T
a
= –20°C to
+75°C (regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition
Item Symbol Min Max Unit Test Conditions
I/O port Output data
delay time t
F
— 50 ns Figure 23-12
Input data
setup time t
PRS
30 —
Input data
hold time t
PRH
30 —
PPG Pulse output
delay time t
POD
— 50 ns Figure 23-13
TPU Timer output
delay time t
TOCD
— 50 ns Figure 23-14
Timer input
setup time t
TICD
30 —
Timer clock
input setup
time t
TCKS
30 — ns Figure 23-15
Timer clock Single edge t
TCKWH
1.5 — t
cyc
pulse width
Both edges t
TCKWL
2.5 —
PWM Pulse output
delay time t
MPWMOD
— 50 ns Figure 23-16