Hitachi H8S/2645, Hardware Manual

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Bit 3—Counter Start (CST): Bit 3 selects starting or stopping of the PWCNT counter for the
corresponding channel.
Bit 3: CST Description
0 PWCNT is stopped (Initial value)
1 PWCNT is started
Bits 2 to 0—Clock Select (CKS): Bits 2 to 0 select the clock for the PWCNT counter in the
corresponding channel.
Bit 2: CKS2 Bit 1: CKS1 Bit 0: CKS0 Description
0 0 0 Internal clock: counts on ø/1 (Initial value)
1 Internal clock: counts on ø/2
1 0 Internal clock: counts on ø/4
1 Internal clock: counts on ø/8
1 * * Internal clock: counts on ø/16
*
: Don’t care
17.2.2 PWM Output Control Registers 1 and 2 (PWOCR1, PWOCR2)
PWOCR1
Bit 7 6 5 4 3 2 1 0
OE1H OE1G OE1F OE1E OE1D OE1C OE1B OE1A
Initial value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
PWOCR2
Bit 7 6 5 4 3 2 1 0
OE2H OE2G OE2F OE2E OE2D OE2C OE2B OE2A
Initial value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
PWOCR is an 8-bit read/write register that enables or disables PWM output. PWOCR1 controls
outputs PWM1H to PWM1A, and PWOCR2 controls outputs PWM2H to PWM2A.
PWOCR is initialized to H'00 upon reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode.