Hitachi H8S/2645, Hardware Manual

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15.2.4 Mailbox Configuration Register (MBCR)
The mailbox configuration register (MBCR) is a 16-bit readable/writable register that is used to set
mailbox (buffer) transmission/reception.
MBCR
Bit: 15 14 13 12 11 10 9 8
MBCR7 MBCR6 MBCR5 MBCR4 MBCR3 MBCR2 MBCR1
—
Initial value: 0 0 0 0 0 0 0 1
R/W: R/W R/W R/W R/W R/W R/W R/W —
Bit: 7 6 5 4 3 2 1 0
MBCR15 MBCR14 MBCR13 MBCR12 MBCR11 MBCR10 MBCR9 MBCR8
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bits 15 to 9 and 7 to 0—Mailbox Setting Register: These bits set the polarity of the
corresponding mailboxes.
Bit x: MBCRx Description
0 Corresponding mailbox is set for transmission (Initial value)
1 Corresponding mailbox is set for reception
(x = 15 to 0)
Bit 8—Reserved: This bit always reads 1. The write value should always be 1.