Hitachi H8S/2645, Hardware Manual

Page: 568 / 1153

536
Bit 1—Halt Request (MCR1): Controls halting of the HCAN module.
Bit 1: MCR1 Description
0 HCAN normal operating mode (Initial value)
1 HCAN halt mode transition request
Bit 0—Reset Request (MCR0): Controls resetting of the HCAN module.
Bit 0: MCR0 Description
0 Normal operating mode (MCR0 = 0 and GSR3 = 0)
[Setting condition]
When 0 is written after an HCAN reset
1 HCAN reset mode transition request (Initial value)
In order for GSR3 to change from 1 to 0 after 0 is written to MCR0, time is required before the
HCAN is internally reset. There is consequently a delay before GSR3 is cleared to 0 after MCR0
is cleared to 0.
15.2.2 General Status Register (GSR)
The general status register (GSR) is an 8-bit readable register that indicates the status of the CAN
bus.
GSR
Bit: 7 6 5 4 3 2 1 0
— — — — GSR3 GSR2 GSR1 GSR0
Initial value: 0 0 0 0 1 1 0 0
R/W: R R R R R R R R
Bits 7 to 4—Reserved: These bits always read 0.