Hitachi H8S/2645, Hardware Manual

Page: 82 / 1153

50
Type Instruction Size
* 1
Function
Arithmetic
operations DIVXS B/W Rd ÷ Rs
→
Rd
Performs signed division on data in two general
registers: either 16 bits ÷ 8 bits
→
8-bit quotient and 8-bit
remainder or 32 bits ÷ 16 bits
→
16-bit quotient and 16-
bit remainder.
CMP B/W/L Rd – Rs, Rd – #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
NEG B/W/L 0 – Rd
→
Rd
Takes the two's complement (arithmetic complement) of
data in a general register.
EXTU W/L Rd (zero extension)
→
Rd
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
EXTS W/L Rd (sign extension)
→
Rd
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
TAS B @ERd – 0, 1
→
(<bit 7> of @ERd)
*
2
Tests memory contents, and sets the most significant bit
(bit 7) to 1.
MAC — (EAs)
×
(EAd) + MAC
→
MAC
Performs signed multiplication on memory contents and
adds the result to the multiply-accumulate register. The
following operations can be performed:
16 bits
×
16 bits + 32 bits
→
32 bits, saturating
16 bits
×
16 bits + 42 bits
→
42 bits, non-saturating
CLRMAC — 0
→
MAC
Clears the multiply-accumulate register to zero.
LDMAC
STMAC L Rs
→
MAC, MAC
→
Rd
Transfers data between a general register and a
multiply-accumulate register.