Hitachi H8S/2645, Hardware Manual

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Port H Data Direction Register (PHDDR)
Bit : 7 6 5 4 3 2 1 0
PH7DDR PH6DDR PH5DDR PH4DDR PH3DDR PH2DDR PH1DDR PH0DDR
Initial value : 0 0 0 0 0 0 0 0
R/W : W W W W W W W W
PHDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port H. PHDDR cannot be read. If it is, an undefined value will be read.
PHDDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port H Data Register (PHDR)
Bit : 7 6 5 4 3 2 1 0
PH7DR PH6DR PH5DR PH4DR PH3DR PH2DR PH1DR PH0DR
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
PHDR is an 8-bit readable/writeable register that stores output data for the port H pins (PH7 to
PH0).
PHDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port H Register (PORTH)
Bit : 7 6 5 4 3 2 1 0
PH7 PH6 PH5PH4 PH3 PH2 PH1 PH0
Initial value : — * — * — * — * — * — * — * — *
R/W : R R R R R R R R
Note:
*
Determined by the state of PH7 to PH0
PORTH is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port H pins (PH7 to PH0) must always be performed on PHDR.
If a port H read is performed while PHDDR bits are set to 1, the PHDR values are read. If a port H
read is performed while PHDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTH contents are determined by the pin states, as
PHDDR and PHDR are initialized. PORTH retains its prior state in software standby mode.