1046
SCR1—Serial Control Register 1
H'FF82
SCI1
7
TIE
0
R/W
6
RIE
0
R/W
5
TE
0
R/W
4
RE
0
R/W
3
MPIE
0
R/W
0
CKE0
0
R/W
2
TEIE
0
R/W
1
CKE1
0
R/W
Bit
Initial value
Read/Write
Clock Enable 1 and 0
0
Asynchronous
mode
Clocked
synchronous mode
0
Asynchronous
mode
1
Clocked
synchronous mode
1
Asynchronous
mode
0
Clocked
synchronous mode
Asynchronous
mode
1
Clocked
synchronous mode
Internal clock/SCK pin
functions as I/O port
Internal clock/SCK pin
functions as serial clock output
Internal clock/SCK pin
functions as clock output
*
9
Internal clock/SCK pin
functions as serial clock output
External clock/SCK pin
functions as clock input
*
10
External clock/SCK pin
functions as serial clock input
External clock/SCK pin
functions as clock input
*
10
External clock/SCK pin
functions as serial clock input
Transmit End Interrupt Enable
0
Transmit-end interrupt (TEI) request disabled
*
8
1
Transmit-end interrupt (TEI) request enabled
*
8
Multiprocessor Interrupt Enable
0
Multiprocessor interrupts disabled
(normal reception mode performed)
[Clearing conditions]
• When the MPIE bit is cleared to 0
• When MPB = 1 data is received
1
Multiprocessor interrupts enabled
*
7
Receive interrupt (RXI) requests, receive-error interrupt (ERI)
requests, and setting of the RDRF, FER, and ORER flags in
SSR are disabled until data with the multiprocessor bit set to
1 is received
Receive Enable
0
Reception disabled
*
5
1
Reception enabled
*
6
Transmit Enable
0
Transmission disabled
*
3
1
Transmission enabled
*
4
Receive Interrupt Enable
0
Receive-data-full interrupt (RXI)
request and receive-error interrupt
(ERI) request disabled
*
2
1
Receive-data-full interrupt (RXI)
request and receive-error interrupt
(ERI) request enabled
Transmit Interrupt Enable
0
Transmit-data-empty interrupt
(TXI) request disabled
*
1
1
Transmit-data-empty interrupt
(TXI) request enabled
Summary of Contents for H8S/2645
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