Isolation
-
+
ADC
Isolated channel
-
+
ADC
Isolated channel
Chassis
140 V DC,
55 V RMS
70
V DC,
33
V RMS
70 V DC,
33 V
RMS
70 V DC,
33 V
RMS
Figure A.193:
Isolation schematic
Channel to chassis (earth)
33 V RMS,
±
70 V DC
Channel to channel
(Isolated GND to isolated GND)
33 V RMS,
±
70 V DC
Input signal
-
to
-
input signal
55 V RMS,
±
140 V DC
Analog to Digital Conversion
Sample rate; per channel
0.1 S/s to 200 kS/s
ADC resolution; one ADC per channel
18 bit
ADC type
Successive Approximation Register (SAR); Analog Devices AD7986BCPZ
Time base accuracy
Defined by mainframe:
±
3.5 ppm
(1)
; aging after 10 years
±
10 ppm
Binary sample rate
Supported; calculating FFTs results in rounded BIN values
Maximum binary sample rate
204.8 kS/s
External time base frequency
0 S/s to 200 kS/s
External time base frequency divider
Divide external clock by 1 to 2
20
External time base level
TTL
External time base minimum pulse width
200 ns
(1)
Mainframes using Interface/Controller modules shipped before 2012:
±
30 ppm.
GEN3t
660
I3995-3.1 en HBM: public