On
-
board Memory
Per card
128 MB (64 MS)
Organization
Automatic distribution amongst enabled channels
Memory diagnostics
Automatic memory test when system is powered on but not recording
Storage sample size
16 bits, 2 bytes/sample
Digital Events/Timer/Counter
Digital event inputs
Not supported
Digital event outputs
Not supported
Timer/Counter
Not supported
Triggering
Channel trigger/qualifier
1 per channel; fully independent per channel, software selectable either trigger or qualifier
Pre
-
and post
-
trigger length
0 to full memory
Maximum trigger rate
400 triggers per second
Manual trigger (Software)
Supported
External Trigger In
Selection per card
User selectable On/Off
Active edge
Rising/Falling mainframe selectable, identical for all cards
Minimum pulse width
500 ns
Delay
±
1 µs + maximum 1 sample period (for decimal and binary time base)
Send to External Trigger Out
User can select to forward External Trigger In to the External Trigger Out BNC
External Trigger Out
Selection per card
User selectable On/Off
Active level
High/Low/Hold High; selectable per mainframe, identical for all cards
Pulse width
High/Low: 12.8 µs
Hold high: Active from first mainframe trigger to end of recording
Pulse width created by mainframe
Delay
516 µs
±
1 µs + maximum 1 sample period using decimal time base
504 µs
±
1 µs + maximum 1 sample period using binary time base
Cross channel triggering
Measurement channels
Logical OR of triggers from all measured signals
Logical AND of qualifiers from all measured signals
Calculated channels
Logical OR of triggers from all calculated signals (RTC and RT
-
FDB)
Logical AND of qualifiers from all calculated signals (RTC and RT
-
FDB)
Analog channel trigger levels
Levels
Maximum 2 level detectors
Resolution
16 bit (0.0015%); for each level
Direction
Rising/Falling; Single direction control for both levels based on selected mode
Hysteresis
0.1 to 100% of Full Scale; defines the trigger sensitivity
Pulse detect/reject
Disable/Detect/Reject software selectable. Maximum pulse width 65 535 samples
dY/dT conversion
dY: 16 bit (0.0015%) for both levels
dT: 1 to 1023 samples. dT setting shared for both levels
Analog channel trigger modes
Basic
POS or NEG crossing; single level
Dual level
One POS and one NEG crossing; Two individual levels, OR
-
ed
Window
Arm/trigger and a disarm level; Trigger on peak level changes in a uni
-
polar signal
Dual Window
Arm/trigger/disarm per level; Trigger on peak level changes in a bi
-
polar signal
Sequential
One arm and one trigger level; eliminate false triggering due to noise or hysteresis
Analog channel qualifier modes
Basic
Above or below level check. Enable/disable trigger with single level
Dual (level)
Outside or within bounds check. Enable/disable trigger with dual level
GEN3t
514
I3995-3.1 en HBM: public