Section 6: 9100 System Operation — SCPI Language
6-19
Final Width = 215mm
Bit 5 (DIO6)
IEEE 488.2-defined Standard Event Summary Bit (ESB)
Summarizes the state of the ‘Event Status byte’, held in the ‘Event Status register’ (ESR),
whose bits represent IEEE 488.2-defined conditions in the device. The ESB bit is true
when the byte in the ESR contains one or more enabled bits which are true; or false when
all the enabled bits in the byte are false.
Bit 6 (DIO7) is the Master Status Summary Message (MSS bit), and is set true if one
of the bits 0 to 5 or bit 7 is true (bits 0, 1 and 2 are always false in the 9100).
Bit 7 (DIO4)
SCPI-defined Operation Status Summary Bit (QSS)
Summarizes the state of the ‘Operation Status data’, held in the ‘Operation Status register’
(OSR), whose bits represent processes in progress in the 9100. The OSS bit is true when
the data in the OSR contains one or more enabled bits which are true; or false when all
the enabled bits in the byte are false. The OSR is described in Sub-Section 6.5.4.
Reading the Status Byte Register
∗
STB?
The common query:
∗
STB? reads the binary number in the Status Byte register. The
response is in the form of a decimal number which is the sum of the binary weighted values
in the enabled bits of the register. In the 9100, the binary-weighted values of bits 0, 1 and
2 are always zero.
6.5.3.4
Service Request Enable Register
The SRE register is a means for the application program to select, by enabling individual
Status Byte summary bits, those types of events which are to cause the 9100 to originate
an RQS. It contains a user-modifiable image of the Status Byte, whereby each true bit
acts to enable its corresponding bit in the Status Byte.
Bit Selector:
∗
SRE phs Nrf
The common program command:
∗
SRE phs Nrf performs the selection, where Nrf is a
decimal numeric, whose binary decode is the required bit-pattern in the enabling byte.
For example:
If an RQS is required only when a Standard-defined event occurs and when a message
is available in the output queue, then Nrf should be set to 48. The binary decode is
00110000 so bit 4 or bit 5, when true, will generate an RQS; but with this decode, even
if bit 3 is true, no RQS will result. The 9100 always sets false the Status Byte bits 0,
1 and 2, so they can never originate an RQS whether enabled or not.
Reading the Service Request Enable Register
The common query:
∗
SRE? reads the binary number in the SRE register. The response
is in the form of a decimal number which is the sum of the binary-weighted values in the
register. The binary-weighted values of bits 0, 1 and 2 will always be zero.
