CMT2380F17
Rev0.1 | 108/347
www.cmostek.com
SFR Page
= 4 only
SFR Address = 0xA4
Bit
7
6
5
4
3
2
1
0
Name
POE5
POE4
C0CKOE
SPI0M0
--
--
--
--
R/W
R/W
R/W
R/W
R/W
W
W
W
W
Reset Value
1
1
0
0
0
0
0
0
Bit 7: POE5, PCA0 PWM5 main channel (PWM5O) output control.
0: Disable PWM5O output on port pin.
1: Enable PWM5O output on port pin. Default is enabled.
Bit 6: POE4, PCA0 PWM4 main channel (PWM4O) output control.
0: Disable PWM4O output on port pin.
1: Enable PWM4O output on port pin. Default is enabled.
Bit 5: C0CKOE, PCA0 clock output (C0CKO) enable.
0: Disable PCA0 clock output.
1: Enable PCA0 clock output with PCA0 base timer overflow rate/2.
。
AUXR8
：
Auxiliary Register 8
SFR Page
= 5 only
SFR Address = 0xA4
Bit
7
6
5
4
3
2
1
0
Name
POE7
POE6
C0PPS2
--
KBI0PS0
S1COPS
--
--
R/W
R/W
R/W
R/W
W
R/W
R/W
W
W
Reset Value
1
1
0
0
0
0
0
0
Bit 7: POE7, PCA0 PWM7 main channel (PWM7O) output control.
0: Disable PWM7O output on port pin.
1: Enable PWM7O output on port pin. Default is enabled.
Bit 6: POE6, PCA0 PWM6 main channel (PWM6O) output control.
0: Disable PWM6O output on port pin.
1: Enable PWM6O output on port pin. Default is enabled.
Bit 5: C0PPS2, {PWM6, PWM7} Port pin Selection 2.
C0PPS2
PWM6
PWM7
0
P6.0
P6.1
1
P3.0
P3.1
Bit 3: KBI0PS0, KBI0~1 Port pin Selection 0.
KBI0PS0
KBI0
KBI1
0
P1.0
P1.1
1
P4.7
P3.3
Bit 2: S1COPS, S1BRG Clock Output (S1CKO) port pin Selection.
S1COPS
S1CKO
0
P4.7
1
P6.1
AUXR9: Auxiliary Register 9
SFR Page
= 6 only
SFR Address = 0xA4
Bit
7
6
5
4
3
2
1
0
Name
--
--
T1G1
T0G1
C0FDC1
C0FDC0
S1PS1
S1PS0
R/W
W
W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
0
0
0
0
0
0
0
0
Summary of Contents for CMT2380F17
Page 27: ...CMT2380F17 Rev0 1 27 347 www cmostek com 1 25 Phase Noise...
Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
Page 246: ...CMT2380F17 Rev0 1 246 347 www cmostek com SnMIPS S0MI S1MI 1 P3 3 P4 7...
