CMOSTEK CMT2380F17, Manual, Page: 325 / 347

CMT2380F17
Rev0.1 | 325/347
www.cmostek.com
Bit 3~1: Reserved bits. When AUXR1 is written, the software must write "0" to these bits.
Bit 0: DPS, DPTR select bit. Use to switch between DPTR0 and DPTR1.
0: Select DPTR0.
1: Select DPTR1.
DPS DPTR Selection
0 DPTR0
1 DPTR1

AUXR2: Auxiliary Register 2
SFR Page = 0 only
SFR Address = 0xA3
Bit
7 6 5 4 3 2 1 0
Name
STAF STOF -- -- T1X12 T0X12 T1CKOE T0CKOE
R/W
R/W R/W W W R/W R/W R/W R/W
Reset Value
0 0 X X 0 0 0 0
Bit 7: STAF, Start Flag detection of STWI (SID).
0: Clear by firmware by writing “0” on it. STAF might be held within MCU reset period, so needs to clear
STAF in firmware initial.
1: Set by hardware to indicate the START condition occurred on STWI bus.
Bit 6: STOF, Stop Flag detection of STWI (SID). 0: Clear by firmware by writing “0” on it.
1: Set by hardware to indicate the STOP condition occurred on STWI bus. STOF might be held within
MCU reset period, so needs to clear STOF in firmware initial.
Bit 5~4
：保留位。当写
AUXR2
寄存器时软件必须在这些位写“
0
”。
Bit 5~4: Reserved bits. When writing the AUXR2 register, the software must write "0" in these bits.
Bit 3: T1X12, Timer 1 clock source selection when C/T=0.
0: Clear to select SYSCLK/12 as the timer 1 clock source.
1: Set to select SYSCLK as the timer 1 clock source.
Bit 2: T0X12, Timer 0 clock source selection when C/T=0.
0: Clear to select SYSCLK/12 as the timer 0 clock source.
1: Set to select SYSCLK as the timer 0 clock source.
Bit 1: T1CKOE, Timer 1 clock output enable.
0: Disable timer 1 clock output.
1: Enable Timer 1 clock output on the T1CKO port pin.
Bit 0: T0CKOE, Timer 0 clock output enable.
0: Disable timer 0 clock output.
1: Enable timer 0 clock output on the T0CKO port pin.

AUXR3: Auxiliary Register 3
SFR Page = 0 only
SFR Address = 0xA4
Bit 7 6 5 4 3 2 1 0
Name T0PS1 T0PS0 BPOC1 BPOC0 S0PS0 TWIPS1 TWIPS0 T0XL
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset Value 0 0 0 0 0 0 0 0
Bit 7~6: T0PS1~0, Timer 0 Port pin Selection [1:0].
T0PS1~0 T0/T0CKO