CMT2380F17
Rev0.1 | 93/347
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14 Configurable I/O Ports
The CMT2380F17 has following I/O ports: P0.0~P0.7, P1.0~P1.7, P2.0~P2.7, P3.0~P3.7, P4.0~P4.7 and
P6.0~P6.3/P6.4. If disable external reset function, P4.7 function is valid. The exact number of I/O pins
available depends upon the package types. See Table 14
–
1.
14.1
IO Structure
The I/O operating modes are distinguished two groups in CMT2380F17. The first group is only for Port 3
to support four configurations on I/O operating. These are: quasi-bidirectional (standard 8051 I/O port),
push-pull output, input-only (high-impedance input) and open-drain output. The Port 3 default setting is
quasi-bidirectional mode with weakly pull-up resistance.
All other general port pins belong to the second group. They can be programmed to four operating modes,
which include analog input only, open-drain output with pull-up resistor, open-drain output and push-pull
output. The default setting of this group I/O is analog input only, which means the port pin in high impedance
state.
Following sections describe the configuration of the all types I/O mode.
。
14.1.1
Port 3 Quasi-Bidirectional IO Structure
Port 3 pins in quasi-bidirectional mode are similar to the standard 8051 port pins. A quasi-bidirectional
port can be used as an input and output without the need to reconfigure the port. This is possible because
when the port outputs a logic high, it is weakly driven, allowing an external device to pull the pin low. When the
pin outputs low, it is driven strongly and able to sink a large current. There are three pull-up transistors in the
quasi-bidirectional output that serve different purposes.
One of these pull-
ups, called the “very weak” pull-up, is turned on whenever the port register for the pin
contains a logic “1”. This very weak pull-up sources a very small current that will pull the pin high if it is left
floating. A second pull-
up, called the “weak” pull-up, is turned on when the port register for the pin contains a
logic “1” and the pin itself is also at a logic “1” level. This pull-up provides the primary source current for a
quasi-bidirectional pin that is outputting a 1. If this pin is pulled low by the external device, this weak pull-up
turns off, and only the very weak pull-up remains on. In order to pull the pin low under these conditions, the
external device has to sink enough current to over-power the weak pull-up and pull the port pin below its input
threshold voltage. The third pull-
up is referred to as the “strong” pull-up. This pull-up is used to speed up
low-to-high transitions on a quasi-bidirectional port pin when the port regist
er changes from a logic “0” to a
logic “1”. When this occurs, the strong pull-up turns on for one CPU clocks, quickly pulling the port pin high.
VDD
Port
Pin
1 clock
delay
Strong
Very
weak
Weak
Input data
Port latch data
VDD
VDD
Figure 14-1. Port 3 Quasi-Bidirectional I/O
Summary of Contents for CMT2380F17
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