CMT2380F17
Rev0.1 | 97/347
www.cmostek.com
Figure 14-1. Port 3 Configuration Settings
P3M0.y
P3M1.y
Port Mode
0
0
Quasi-Bidirectional (default)
0
1
Push-Pull Output
1
0
Input Only (High Impedance Input)
1
1
Open-Drain Output
Note: Where y=0~7 (port pin). The registers P3M0 and P3M1 are listed in each port description.
Other general port pins also support four operating modes, as shown in Table 14
–3. Two mode registers
select the I/O type for each port pin and setting to analog-input-only on these port pins after system reset.
Figure 14-2. General Port Configuration Settings
PxM0.y
PxM1.y
Port Mode
0
1
Analog Input Only (default)
1
1
Open-Drain with Pull-up resistor
0
0
Open-Drain Output / General Digital Input (Port Pin set
to “1”)
1
0
Push-Pull Output
Note: Where x= 0, 1, 2, 4, 6 (port number), and y=0~7 (port pin). The registers PxM0 and PxM1 are listed
in each port description.
14.2.1
Port 1 Register
P1
：
Port 1 Register
SFR Page
= 0~F
SFR Address = 0x90
Bit
7
6
5
4
3
2
1
0
Name
P1.7
P1.6
P1.5
--
--
--
P1.1
P1.0
R/W
R/W
R/W
R/W
W
W
W
R/W
R/W
Reset Value
1
1
1
1
1
1
1
1
Bit 7, 6, 5, 1,0: Port 1 output data latch could be only set/cleared by CPU.
Summary of Contents for CMT2380F17
Page 27: ...CMT2380F17 Rev0 1 27 347 www cmostek com 1 25 Phase Noise...
Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
Page 246: ...CMT2380F17 Rev0 1 246 347 www cmostek com SnMIPS S0MI S1MI 1 P3 3 P4 7...
