CMT2380F17
Rev0.1 | 123/347
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Bit 7: reserved. In case of writing IP0L, this bit must be set to 0 by software.
Bit 6: PX2L, external interrupt 2 priority-L register.
Bit 5: PT2L, Timer 2 interrupt priority-L register.
Bit 4: PSL, Serial port interrupt priority-L register.
Bit 3: PT1L, Timer 1 interrupt priority-L register.
Bit 2: PX1L, external interrupt 1 priority-L register.
Bit 1: PT0L, Timer 0 interrupt priority-L register.
Bit 0: PX0L, external interrupt 0 priority-L register.
IP0H
:
Interrupt Priority 0 High Register
SFR Page
= 0~F
SFR Address = 0xB7
Bit
7
6
5
4
3
2
1
0
Name
--
PX2H
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
R/W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
0
0
0
0
0
0
0
0
Bit 7: reserved. In case of writing IP0H, this bit must be set to 0 by software.
Bit 6: PX2H, external interrupt 2 priority-H register.
Bit 5: PT2H, Timer 2 interrupt priority-H register.
Bit 4: PSH, Serial port interrupt priority-H register.
Bit 3: PT1H, Timer 1 interrupt priority-H register.
Bit 2: PX1H, external interrupt 1 priority-H register.
Bit 1: PT0H, Timer 0 interrupt priority-H register.
Bit 0: PX0H, external interrupt 0 priority-H register.
。
EIE1
:
Extended Interrupt Enable 1 Register
SFR Page
= 0~F
SFR Address = 0xAD
Bit
7
6
5
4
3
2
1
0
Name
--
ETWI0
EKB
ES1
ESF
EPCA
EADC
ESPI
R/W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
0
0
0
0
0
0
0
0
B Bit 6: ETWI0, Enable TWI0/ I2C0 interrupt.
0: Disable TWI0/ I2C0 interrupt.
1: Enable TWI0/ I2C0 interrupt.
Bit 5: EKBI, Enable Keypad Interrupt.
0: Disable the interrupt when KBCON.KBIF is set in Keypad control module.
1: Enable the interrupt when KBCON.KBIF is set in Keypad control module.
Bit 4: ES1, Enable Serial Port 1 (UART1) interrupt.
0: Disable Serial Port 1 interrupt.
1: Enable Serial Port 1 interrupt.
Bit 3: ESF, Enable System Flag interrupt.
0: Disable the interrupt when the group of {RTCF, BOF1, BOF0, WDTF} in PCON1, {STAF, STOF} in
AUXR2, {BM1F, BM0F} in AUXR0, or TI0 with UTIE is set.
1: Enable the interrupt of the flags of { RTCF, BOF1, BOF0, WDTF} in PCON1, {STAF, STOF} in AUXR2,
{BM1F, BM0F} in AUXR0, or TI0 with UTIE when the associated system flag interrupt is enabled in SFIE.
Bit 2: EPCA, Enable PCA0 interrupt.
0: Disable PCA0 interrupt.
1: Enable PCA0 interrupt.
Bit 1: EADC, Enable ADC Interrupt.
0: Disable the interrupt when ADCON0.ADCI is set in ADC module.
Summary of Contents for CMT2380F17
Page 27: ...CMT2380F17 Rev0 1 27 347 www cmostek com 1 25 Phase Noise...
Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
Page 246: ...CMT2380F17 Rev0 1 246 347 www cmostek com SnMIPS S0MI S1MI 1 P3 3 P4 7...