CMT2380F17
Rev0.1 | 96/347
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Port
Pin
Input data
Port latch data
Figure 14-7. General Open-Drain Output
14.1.8
General Port Digital Input Configured
A Port pin is configured as a digital input by setting its output mode to “Open-Drain” and writing a logic “1”
to the associated bit in the Port Data register. For example, P1.0 is configured as a digital input by setting
P1M0.0 to a logic 0, P1M1.0 to a logic 0 and P1.0 to a logic 1.
14.1.9
General Push-Pull Output Structure
The push-pull output configuration on general port pins has the same function with port 3 push-pull output
mode. The push-pull port configuration is shown in Figure 14
–8.
Port
Pin
Strong
Input data
Port latch data
VDD
Figure 14-8. General Push-Pull Output
14.1.10
Port Pin Output Driving Strength Selection
The I/O of the CMT2380F17 has two driving strength can be selected for different kinds of the application
to match the output impedance. Please reference 14.2.6 Port Output Driving Strength Control Register.
。
14.1.11
Port Pin Output Fast Driving Selection
The I/O of the CMT2380F17 has two driving speed can be selected for different kinds of the I/O
frequency. Please reference 14.2.7 Port Output Fast Driving Control Register.
14.2
I/O Port Register
All I/O port pins on the CMT2380F17 may be individually and independently configured by software to
select its operating modes. Port 3 has four operating modes, as shown in Table 14
–2. Two mode registers
select the output type for each port 3 pin. Only Port 3 supports quasi-bidirectional mode and setting them to
quasi-bidirectional mode after system reset.
Summary of Contents for CMT2380F17
Page 27: ...CMT2380F17 Rev0 1 27 347 www cmostek com 1 25 Phase Noise...
Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
Page 246: ...CMT2380F17 Rev0 1 246 347 www cmostek com SnMIPS S0MI S1MI 1 P3 3 P4 7...
