CMT2380F17
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7 XRAM Access
The CMT2380F17 MCUs include 768 bytes of on-chip RAM mapped into the external data memory space
(XRAM). The external memory space may be accessed using the external move instruction (MOVX) and the
data pointer (DPTR), or using the MOVX indirect addressing mode using R0 or R1. If the MOVX instruction is
used with an 8-bit address operand (such as @R1), then the high byte of the 16-bit address is provided by the
XRAM Page Select Register (XRPS).
The internal XRAM memory space is accessed using the MOVX instruction. The MOVX instruction has two
forms, both of which use an indirect addressing method. The first method uses the Data Pointer, DPTR, a
16-bit register which contains the effective address of the XRAM location to be read or written. The second
method uses R0 or R1 in combination with the XRPS register to generate the effective XRAM address.
7.1
MOVX on 16-bit Address with dual DPTR
The dual DPTR structure as shown in Figure 7
–1 is a way by which the chip can specify the address of
an external data memory location. There are two 16-bit DPTR registers that address the external memory,
and a single bit called DPS (AUXR1.0) that allows the program code to switch between them.
DPTR1
DPTR0
AUXR1.0
External Data Memory
(83h)
(82h)
DPL
DPH
DPL
DPH
DPS
DPS=0
DPS=1
MOVX @DPTR0 or DPTR1
Figure 7
–1. Dual DPTR Structure
DPTR Instructions
The six instructions that refer to DPTR currently selected using the DPS bit are as follows:
INC DPTR
;Increments the data pointer by 1
MOV DPTR,#data16
; Loads the DPTR with a 16-bit constant
MOV A,@A+DPTR
;Move code byte relative to DPTR to ACC
MOVX A,@DPTR
; Move external RAM (16-bit address) to ACC
MOVX @DPTR,A
; Move ACC to external RAM (16-bit address)
JMP @A+DPTR
; Jump indirect relative to DPTR
AUXR1
: Auxiliary Control Register 1
SFR Page
= 0~F
SFR Address = 0xA2
Bit
7
6
5
4
3
2
1
0
Name
--
--
CRCDS1
CRCDS0
--
--
--
DPS
R/W
W
W
R/W
R/W
W
W
W
R/W
Reset Value
0
0
0
0
0
0
0
0
Summary of Contents for CMT2380F17
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