CMOSTEK CMT2380F17, Manual

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CMT2380F17
Rev0.1 | 323/347
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CKCON4 Clock Control 4 42H RCSS2 RCSS1 RCSS0 RPSC2 RPSC1 RPSC0 RTCCS3 RTCCS2 00000000
CKCON5 Clock Control 5 43H -- -- -- -- -- -- -- CKMS0 00000000
PCON2 Power Control 2 44H AWBOD1 0 BO1S1 BO1S0 BO1RE EBOD1 BO0RE 1 0000x1x1
PCON3 Power Control 3 45H IVREN 0 0 0 0 0 0 0 00000000
SPCON0
SFR Page
Control 0
48H -- P6CTL P4CTL WRCTL -- CKCTL0 PWCTL1 PWCTL0 00000000
DCON0 Device Control 0 4CH HSE IAPO HSE1 -- -- IORCTL RSTIO OCDE 100xx011
RTCCR RTC Control Reg. 54H RTCE RTCO RTCRL5 RTCRL4 RTCRL3 RTCRL2 RTCRL1 RTCRL0 00111111
RTCTM
RTC Timer
Register
55H RTCCS1 RTCCS0 RTCCT5 RTCCT4 RTCCT3 RTCCT2 RTCCT1 RTCCT0 01111111
Logical Bytes
PCON0 Power Control 0 87H SMOD1 SMOD0 GF POF0 GF1 GF0 PD IDL 00010000
PCON1 Power Control 1 97H SWRF EXRF -- RTCF -- BOF1 BOF0 WDTF 0000x000
CKCON0 Clock Control 0 C7H AFS ENCKM CKMIS1 CKMIS0 CCKS SCKS2 SCKS1 SCKS0 00010000
WDTCR
Watch-dog-timer
Control register
E1H WREN NSW ENW CLRW WIDL PS2 PS1 PS0 00000000
P4 Port 4 E8H P4.7 -- P4.5 P4.4 -- -- -- -- 1x11xx11
P6 Port 6 F8H -- -- -- -- -- -- P6.1 P6.0 xxxxxx11
Sample Code of
Page-P
SFR write
：
IFADRH =
0x00;
ISPCR = ISPEN; //enable IAP/ISP
IFMT = MS2; // Page-P write
，
IFMT =0x04
IFADRL = SPCON0; //Set Page-P SFR address
IFD |= CKCTL0; // set CKCTL0
SCMD = 0x46; //
SCMD = 0xB9; //
IFMT = Flash_Standby; // IAP/ISP
standby
，
IFMT =0x00 ISPCR &= ~ISPEN;