CMOSTEK CMT2380F17, Manual, Page: 304 / 347

CMT2380F17
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Figure 28-7. Demo Code for ISP/IAP byte Read
MOV ISPCR, #10000011b ; ISPCR.7=1, enable ISP
MOV IFMT, #01h ; select Read Mode
MOV IFADRH, ?? ; fill [IFADRH,IFADRL] with byte address
MOV IFADRL, ?? ;
MOV SCMD, #46h ; fill [IFADRH,IFADRL] with byte address
MOV SCMD, #0B9h ;
; Now, MCU will halt here until processing completed
MOV A, IFD ; now, the read data exists in IFD
MOV IFMT, #00h ; select Standby Mode
MOV ISPCR, #00000000b ; ISPCR.7 = 0, disable ISP
28.3 ISP Operation
ISP means In-System-Programming which makes it possible to update the
user’s application program (in
AP-memory) and non-volatile application data (in IAP-memory) without removing the MCU chip from the
actual end product. This useful capability makes a wide range of field-update applications possible. The ISP
mode is used in the loader program to program both the AP-memory and IAP-memory.
Note:
(1) Before using the ISP feature, the user should configure an ISP-memory space and pre-program the
ISP code (boot loader program) into the ISP-memory by a universal Writer/Programmer or Megawin
proprietary Writer/Programmer.
(2) ISP code in the ISP-memory can only program the AP-memory and IAP-memory.
After ISP operation has been finished, software writes “001” on ISPCR.7 ~ ISPCR.5 which triggers an
software RESET and makes CPU reboot into application program memory (AP-memory) on the address
0x0000.
As we have known, the purpose of the ISP code is to program both AP-memory and IAP-memory.
Therefore, the MCU must boot from the ISP-memory in order to execute the ISP code. There are two methods
to implement In-System Programming according to how the MCU boots from the ISP-memory.
28.3.1 Hardware approached ISP
To make the MCU directly boot from the ISP-
memory when it is just powered on, the MCU’s hardware
options HWBS and ISP Memory must be enabled. The ISP entrance method by hardware option is named
hardware approached. Once HWBS and ISP Memory are enabled, the MCU will always boot from the
ISP-memory to execute the ISP code (boot loader program) when it is just powered on. The first thing the ISP
code should do is to check if there is an ISP request. If there is no ISP requested, the ISP code should trigger
a software reset (setting ISPCR.7~5 to “101” simultaneously) to make the MCU re-boot from the AP-memory
to run the user’s application program..
If the additional hardware option, HWBS2, is enabled with HWBS and ISP Memory, the MCU will always
boot from ISP memory after power-on or external reset finished. It provides another hardware approached
way to enter ISP mode by external reset signal. After first time power-on, MG82F6D17 can perform ISP
operation by external reset trigger and doesn’t wait for next time power-on, which suits the non-power-off
system to apply the hardware approached ISP function.