CMT2380F17
Rev0.1 | 237/347
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0
0
1
1
8-bit UART
variable
0
1
0
2
9-bit UART
SYSCLK/64, /32 or /192, /96
0
1
1
3
9-bit UART
variable
1
0
0
4
SPI Master
SYSCLK/12 or SYSCLK/4
1
0
1
5
Reserved
variable
1
1
0
6
Reserved
Reserved
1
1
1
7
Reserved
variable
S1M0X3 also controls the SPI transfer speed. If S1M0X3 = 1, the SPI clock frequency is SYSCLK/4.
Otherwise, the SPI clock frequency is SYSCLK/12.
The SPI master in MG82F6D17 uses the TXD1 as SPICLK, RXD1 as MOSI, and S1MI as MISO. nSS is
selected by MCU software on other port pin. Figure 19
–2 shows the SPI connection. It also can support the
configuration for multiple slaves communication in Figure 19
–3.
Figure 19
–2. Serial Port 1 Mode 4, Single Master and Single Slave configuration (n = 1)
Figure 19
–3. Serial Port 1 Mode 4, Single Master and Multiple Slaves configuration (n = 1)
The SPI master satisfies the transfer with the full function SPI module of Megawin MG82/84 series MCU
with CPOL, CPHA and DORD selection. For CPOL and CPHA condition, MG82F6D17 uses an easy way by
initialize SPI clock polarity to fit them. Table 18
–12 shows the serial port Mode 4 mapping with the four SPI
operating mode.
Table 19
–12. SPI mode mapping with Serial Port Mode 4 configuration
SPI Mode
CPOL
CPHA
Configuration in TXD1
Summary of Contents for CMT2380F17
Page 27: ...CMT2380F17 Rev0 1 27 347 www cmostek com 1 25 Phase Noise...
Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
Page 246: ...CMT2380F17 Rev0 1 246 347 www cmostek com SnMIPS S0MI S1MI 1 P3 3 P4 7...
