CMT2380F17
Rev0.1 | 37/347
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4.6
Transceiver Built-in Low Battery Detection
The chip is employed with low battery detection function which is performed each time when the frequency is tuned.
Frequency tuning occurs when the chip transitions from the SLEEP/STBY state to the RFS/TFS/TX/RX state. The detection
result can be read by the LBD_VALUE register.
4.7
Receiver Signal Strength Indication (RSSI)
The RSSI is used to evaluate the strength of the signal within the tuned channel. The cascaded I/Q logarithmic amplifier
amplifies the signal before it is sent to the demodulator. The receive signal indicators inside the logarithmic amplifiers ofI channel
and Q channel produce DC voltage that is proportional to the input signal strength. The RSSI output is the sum of the two signal
values, which extend a dynamic range of 80 dB based on the sensitivity. After the signal strength is sampled by the ADC, a
smoother RSSI value is obtained through a SAR filter and a smoothing filter. The order of the smoothing filter can be set via
RSSI_AVG_MODE<2:0>. After filtering, the code value is converted into a dBm value. Users can obtain either the RSSI code
value (RSSI_CODE<7:0>) ordBm value (RSSI_DBM<7:0>) by reading the register. With configuring the value of
RSSI_DET_SEL<1:0>, users can choose to either output the RSSI value in real time or store RSSI value at each stage during
packet receiving.
The CMT2380F17 supports users to set RSSI_TRIG_TH<7:0> threshold. After a comparison between the threshold value
and detected RSSI value, the comparison outputs logic 1 if the RSSI detection value is more than the threshold value, otherwise
it outputs logic 0. The comparison output can be output to the RSSI VLD interrupt or it can support the operation of the internal
super-low power (SLP) mode.
SAR
FILTER
CODE to dBm
CONVERT
SAR
ADC
RSSI AVG
FILTER
RSSI_CODE<7:0>
RSSI_DBM<7:0>
RSSI_AVG_MODE<2:0>
COMPARE to
RSSI_TRIG_TH<7:0>
RESULT
LATCH
LATCH
RSSI_DET_SEL<1:0>
RSSI_DET_SEL<1:0>
Figure 4-3. RSSI Measuring and Comparing Circuit Structure
The CMT2380F17
offers RSSI to meet the qualitative analysis requirements of users generally. However more accurate
RSSI measurement results are needed in case of quantitative analysis, therefore users need to perform production calibration
based on actual solutions. Please refer to AN144- CMT2300A RSSI User Guide for details.
4.8
Phase Jump Detector (PJD)
PJD refers to the phase jump detector. During the chip performing FSK demodulation, it can be used to identify useful
signals from noise via observing the hopping characteristics of received signals.
2
SYM
2
SYM
1
SYM
1
SYM
1
SYM
1
SYM
Summary of Contents for CMT2380F17
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Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
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