Program Flow Prediction
ARM DDI 0301H
Copyright © 2004-2009 ARM Limited. All rights reserved.
5-10
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5.5
ARM1176JZF-S IMB implementation
For the ARM1176JZF-S processor:
•
executing the SVC instruction is sufficient to cause IMB operation
•
both the
IMB
and the
IMBRange
instructions flush all stored information about the instruction
stream.
Note
The
IMB
implementation described here applies to the ARM1020T and later processors,
including the ARM1176JZF-S.
This means that all
IMB
instructions can be implemented in the operating system by returning
from the
IMB
or
IMBRange
service routine, and that the
IMB
and
IMBRange
service routines can be
exactly the same. The following service routine code can be used:
IMB_SVC_handler
IMBRange_SVC_handler
MOVS
PC, R14_svc
; Return to the code after the SVC call
Note
•
In new code, you are strongly encouraged to use the
IMBRange
instruction whenever the
changed area of code is small, even if there is no distinction between it and the
IMB
instruction on ARM1176JZF-S processors. Future processors might implement the
IMBRange
instruction in a more efficient and faster manner, and code migrated from the
ARM1176JZF-S core is likely to benefit when executed on these processors.
•
ARM1176JZF-S processors implement a Flush Prefetch Buffer operation that is
user-accessible and acts as an IMB. For more details see
c7, Cache operations
on
page 3-69.
5.5.1
Execution of IMB instructions
This section comprises three examples that show what can happen during the execution of IMB
instructions. The pseudo code in the square brackets shows what happens to execute the
IMB
(or
IMBRange
) instruction in the SVC handler.
Example 5-1 shows how code that loads a program from a disk, and then branches to the entry
point of that program, must execute an
IMB
instruction between loading the program and trying
to execute it.
Example 5-1 Loading code from disk
IMB
EQU 0xF00000
.
.
; code that loads program from disk
.
.
SVC
IMB
[branch to IMB service routine]
[perform processor-specific operations to execute IMB]
[return to code]
.