
Z 1 = R 1 + jX 1
Z 0 = R 0 + jX0
A
B
Step 1- reach
C
Communication
Step 2- reach
Step 1- reach
Step 2- reach
Y
Y
REL 650
REL 650
ANSI11000115_2_en.vsd
ANSI11000115 V2 EN
Figure 31:
Residual overcurrent protection WEI scheme
For the fault shown in figure
there is a risk of the following consequences if the weak
end infeed logic is not used:
•
Step 1 in the line end A (weak end) does not start due to the small fault current infeed
or too low residual voltage level. This means that the line breaker does not open.
•
The fault detection in line end B is done by means of four step residual overcurrent
protection function step 2. As there is no acceleration signal (CR) from line end A, the
communication scheme cannot be activated. The fault clearance is thus be delayed
(step 2 time delay).
To overcome this shortcoming of the protection scheme the weak end infeed logic (WEI)
is activated. The function at internal line fault can be described as:
•
For an internal fault step 2 in line end B picks up and sends a signal to line end A (CS)
•
If none of the non-directional start signals of step 1 or 2 in line end A does not pick
up the received signal from line end B (CR) is sent back (echo).
•
If the voltage in line end A is low and the four step residual overcurrent protection
steps do not pick up the circuit breaker is tripped (if this feature is set).
•
In line end B the echo signal is received (CR) and the communication scheme gives
an undelayed trip to the circuit breaker.
The function at external fault can be described as:
•
For an external fault step 2 in line end B is activated and sends a signal to line end A
(CS)
•
When the non-directional start signals of step 1 or 2 in line end A are activated, they
prevent the received signal to be sent back to line end B.
•
None of the line ends is tripped.
Section 3
1MRK 506 334-UUS A
REL650 setting examples
80
Application manual
Summary of Contents for REL650 series
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