Rev. 1.0, 09/02, page 553 of 568
Item
Symbol
Min Max Unit Test
Conditions
A/D
converter
Trigger input setup
time
t
TRGS
30
ns Figure
23.12
HCAN
*
Transmit
data
delay
time
t
HTXD
80 ns Figure
23.13
Transmit
data
setup
time
t
HRXS
80
Transmit
data
hold
time
t
HRXH
80
PPG
Pulse output delay
time
t
POD
40 ns Figure
23.14
Note:
*
The HCAN input signal is asynchronous. However, its state is judged to have changed at
the rising-edge (two clock cycles) of the
φ
clock signal shown in figure 23.12. The HCAN
output signal is also asynchronous. Its state changes based on the rising-edge (two clock
cycles) of the
φ
clock signal shown in figure 23.12.
Table 23.7 Timing of SSU
Conditions: V
CC
= 4.5 V to 5.5 V, AV
CC
= 4.5 V to 5.5 V, V
SS
= AV
SS
= 0 ,
φ
=4MHz to 24MHz,
T
a
= –20°C to +75°C (regular specifications), T
a
= –40°C to +85°C (wide-range
specifications)
Содержание H8S/2627
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