Rev. 1.0, 09/02, page 221 of 568
10.5 Interrupt
Sources
There are three kinds of TPU interrupt source; TGR input capture/compare match, TCNT
overflow, and TCNT underflow. Each interrupt source has its own status flag and enable/disabled
bit, allowing the generation of interrupt request signals to be enabled or disabled individually.
When an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the
corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The
interrupt request is cleared by clearing the status flag to 0.
Relative channel priorities can be changed by the interrupt controller, however the priority order
within a channel is fixed. For details, see section 5, Interrupt Controller.
Table 10.36 lists the TPU interrupt sources.
Содержание H8S/2627
Страница 22: ...Rev 1 0 09 02 page xx of xxxvi Index 565 ...
Страница 30: ...Rev 1 0 09 02 page xxviii of xxxiv ...
Страница 36: ...Rev 1 0 09 02 page xxxiv of xxxiv Table 23 9 Flash Memory Characteristics 561 ...
Страница 82: ...Rev 1 0 09 02 page 46 of 568 ...
Страница 88: ...Rev 1 0 09 02 page 52 of 568 ...
Страница 98: ...Rev 1 0 09 02 page 62 of 568 ...
Страница 156: ...Rev 1 0 09 02 page 120 of 568 ...
Страница 390: ...Rev 1 0 09 02 page 354 of 568 ...
Страница 480: ...Rev 1 0 09 02 page 444 of 568 ...
Страница 512: ...Rev 1 0 09 02 page 476 of 568 ...
Страница 527: ...Rev 1 0 09 02 page 491 of 568 21 8 5 Writing to MSTPCR MSTPCR should only be written to by the CPU ...
Страница 528: ...Rev 1 0 09 02 page 492 of 568 ...
Страница 580: ...Rev 1 0 09 02 page 544 of 568 ...