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5.2 Input/Output
Pins
Table 5.1 summarizes the pins of the interrupt controller.
Table 5.1
Pin Configuration
Name I/O
Function
NMI
Input
Nonmaskable external interrupt
Rising or falling edge can be selected
IRQ5
IRQ4
IRQ3
IRQ2
IRQ1
IRQ0
Input
Input
Input
Input
Input
Input
Maskable external interrupts
Rising, falling, or both edges, or level sensing, can be selected
5.3 Register
Descriptions
The interrupt controller has the following registers. For the system control register (SYSCR), refer
to section 3.2.2, System Control Register (SYSCR).
•
System control register (SYSCR)
•
IRQ sense control register H (ISCRH)
•
IRQ sense control register L (ISCRL)
•
IRQ enable register (IER)
•
IRQ status register (ISR)
•
Interrupt priority register A (IPRA)
•
Interrupt priority register B (IPRB)
•
Interrupt priority register C (IPRC)
•
Interrupt priority register D (IPRD)
•
Interrupt priority register E (IPRE)
•
Interrupt priority register F (IPRF)
•
Interrupt priority register G (IPRG)
•
Interrupt priority register H (IPRH)
•
Interrupt priority register I (IPRI)
•
Interrupt priority register J (IPRJ)
•
Interrupt priority register K (IPRK)
•
Interrupt priority register L (IPRL)
•
Interrupt priority register M (IPRM)
Содержание H8S/2627
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