H. Error Detection Circuit
1. Outline
Figure 6-109 is a block diagram showing the control circuit for the error detection
circuit, and the circuit has the following functions:
a. Monitoring the activation of the scanning lamp (LA1).
b. Monitoring the activation of the fixing heater (main, H1; sub, H2).
c. Monitoring the rotation of each motor in normal mode and in stream reading mode.
Each function concentrates at the gate array on the DC controller PCB.
The gate array detects the state of each appropriate load used for the detection of
an error, checks for the presence/absence of an error, and communicates the result to
the master CPU.
Figure 6-109
2. Scanning Lamp Error Activation Detection Circuit
The gate array receives the scanning lamp ON signal (CVRON) and the scanning
lamp ON detection signal (CVR ACTIVE). If the scanning lamp is on in the absence of
the scanning lamp ON signal, the gate array will identify an error.
At this time, the gate array will communicate to the master CPU the wrong detection
and, at the same time, generates the power supply OFF signal.
LA1
H2
H1
RF
PS4
M3
M3
Lamp
regulator
PCB
AC
driver
PCB
Motor
error
detection
PCB
Gate
array
Master
CPU
DC controller PCB
COPYRIGHT © 1997 CANON INC. CANON NP6350/NP6251 REV. 0 JULY 1997 PRINTED IN JAPAN (IMPRIME AU JAPON)
CHAPTER 6 FIXING SYSTEM
6-15
