
DocID024597 Rev 5
RM0351
Debug support (DBG)
1807
Figure 543. SWJ debug port
shows that the asynchronous TRACE output (TRACESWO) is multiplexed with
TDO. This means that the asynchronous trace can only be used with SW-DP, not JTAG-DP.
48.3.1 Mechanism
to
select
the JTAG-DP or the SW-DP
By default, the JTAG-Debug Port is active.
If the debugger host wants to switch to the SW-DP, it must provide a dedicated JTAG
sequence on TMS/TCK (respectively mapped to SWDIO and SWCLK) which disables the
JTAG-DP and enables the SW-DP. This way it is possible to activate the SWDP using only
the SWCLK and SWDIO pins.
This sequence is:
1.
Send more than 50 TCK cycles with TMS (SWDIO) =1
2. Send the 16-bit sequence on TMS (SWDIO) = 0111100111100111 (MSB transmitted
first)
3. Send more than 50 TCK cycles with TMS (SWDIO) =1
48.4
Pinout and debug port pins
The STM32L4x5/STM32L4x6 MCUs are available in various packages with different
numbers of available pins. As a result, some functionalities (ETM) related to pin availability
may differ between packages.
TRACE
S
WO
JTDO
JTDI
NJTR
S
T
nTR
S
T
TDI
TDO
S
WJ-DP
TDO
TDI
nTR
S
T
TCK
TM
S
nPOTR
S
T
JTAG-DP
nPOTR
S
T
From
power-on
re
s
et
DBGRE
S
ETn
DBGDI
DBGDO
DBGDOEN
DBGCLK
S
W-DP
S
WCLKTCK
S
WDOEN
S
WDO
S
WDITM
S
S
WD/JTAG
s
elect
JTM
S
/
S
WDIO
JTCK/
S
WCLK
(
as
ynchrono
us
tr
a
ce)
a
i171
3
9