Rev. 5.00, 12/03, page 472 of 1088
Data Transfer Operations
•
SCI initialization (synchronous mode)
Before transmitting or receiving data, first clear the TE and RE bits in SCR to 0, then initialize
the SCI as described below.
When the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared
to 0 before making the change using the following procedure. When the TE bit is cleared to 0,
the TDRE flag is set to 1 and TSR is initialized. Note that clearing the RE bit to 0 does not
change the contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.
Figure 12-15 shows a sample SCI initialization flowchart.
Wait
<Transfer start>
Start of initialization
Set data transfer format in
SMR and SCMR
No
Yes
Set value in BRR
Clear TE and RE bits in SCR to 0
[2]
[3]
Set TE or RE bit in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits
as necessary
Note: In simultaneous transmit and receive operations, the TE and RE bits should
both be cleared to 0 or set to 1 simultaneously.
[4]
1-bit interval elapsed?
Set CKE1 and CKE0 bits in SCR
(TE, RE bits 0)
[1]
[1] Set the clock selection in SCR. Be sure
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
[2] Set the data transfer format in SMR
and
SCMR.
[3] Write a value corresponding to the bit
rate to BRR. (Not necessary if an
external clock is used.)
[4] Wait at least one bit interval, then set
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits as necessary.
Setting the TE or RE bit enables the
TxD or RxD pin to be used.
Figure 12-15 Sample SCI Initialization Flowchart
Содержание H8S/2318 series
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