Renesas H8S/2318 series, Руководство по оборудованию

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Rev. 5.00, 12/03, page 697 of 1088
Host
RxD1
TxD1
Control command,
analysis execution
software (on-chip)
Flash
memory
On-chip RAM On-chip SCI1
This LSI
Boot
programming
tool and program
data
Control command, program data
Reply response
Figure 17-65 System Configuration in Boot Mode
SCI Interface Setting by Host: When boot mode is initiated, this LSI measures the low period of
asynchronous SCI-communication data (H'00), which is transmitted consecutively by the host.
The SCI transmit/receive format is set to 8-bit data, 1 stop bit, and no parity. This LSI calculates
the bit rate of transmission by the host by means of the measured low period and transmits the bit
adjustment end sign (1 byte of H'00) to the host. The host must confirm that this bit adjustment
end sign (H'00) has been received normally and transmits 1 byte of H'55 to this LSI. When
reception is not executed normally, boot mode is initiated again (reset) and the operation described
above must be executed. The bit rate between the host and this LSI is not matched by the bit rate
of transmission by the host and system clock frequency of this LSI. To operate the SCI normally,
the transfer bit rate of the host must be set to 9,600 bps or 19,200 bps.
The system clock frequency which can automatically adjust the transfer bit rate of the host and the
bit rate of this LSI is shown in table 17-53. Boot mode must be initiated in the range of this system
clock.
D0 D1 D2 D3 D4 D5 D6 D7
Start
bit Stop bit
Measure low period (9 bits) (data is H'00) High period of
at least 1 bit
Figure 17-66 Automatic Adjustment Operation of SCI Bit Rate
Table 17-53 System Clock Frequency that Can Automatically Adjust Bit Rate of This LSI
Bit rate of host
System Clock Frequency which Can Automatically Adjust Bit Rate of
This LSI
19,200 bps 16 MHz to 25 MHz
9,600 bps 8 MHz to 25 MHz