Renesas H8S/2318 series, Руководство по оборудованию

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Rev. 5.00, 12/03, page 820 of 1088
(1) Clock Timing
Table 20-13 Clock Timing
Condition C: V
CC
= 2.4 V to 3.6 V, AV
CC
= 2.4 V to 3.6 V, V
ref
= 2.4 V to AV
CC
, V
SS
= AV
SS
=
0 V,
φ
= 2 MHz to 14 MHz, T
a
= –20°C to 75°C (regular specifications)
Condition C
Item Symbol Min Max Unit Test Conditions
Clock cycle time t
cyc
71 500 ns Figure 20-2
Clock pulse high width t
CH
28 — ns
Clock pulse low width t
CL
28 — ns
Clock rise time t
Cr
— 7.5 ns
Clock fall time t
Cf
— 7.5 ns
Reset oscillation stabilization time
(crystal) t
OSC1
10 — ms Figure 20-3
Software standby oscillation
stabilization time (crystal) t
OSC2
10 — ms
External clock output stabilization
delay time t
DEXT
500 —
µ
s Figure 20-3
(2) Control Signal Timing
Table 20-14 Control Signal Timing
Condition C: V
CC
= 2.4 V to 3.6 V, AV
CC
= 2.4 V to 3.6 V, V
ref
= 2.4 V to AV
CC
, V
SS
= AV
SS
=
0 V,
φ
= 2 MHz to 14 MHz, T
a
= –20°C to 75°C (regular specifications)
Condition C
Item Symbol Min Max Unit Test Conditions
RES
setup time t
RESS
200 — ns Figure 20-4
RES
pulse width t
RESW
20 — t
cyc
NMI setup time t
NMIS
150 — ns Figure 20-5
NMI hold time t
NMIH
10 — ns
NMI pulse width (in recovery from
software standby mode) t
NMIW
200 — ns
IRQ
setup time t
IRQS
150 — ns
IRQ
hold time t
IRQH
10 — ns
IRQ
pulse width (in recovery from
software standby mode)
t
IRQW
200 — ns