Rev. 5.00, 12/03, page 685 of 1088
Bits 15 to 0—Frequency Set (F15 to F0): Set the operating frequency of the CPU. The setting
value must be calculated as the following methods.
1. The operating frequency which is shown in MHz units must be rounded in a number to three
decimal places and be shown in a number of two decimal places.
2. The centuplicated value is converted to the binary digit and is written to the FPEFEQ
parameter (general register ER0). For example, when the operating frequency of the CPU is
25.000 MHz, the value is as follows.
•
The number to three decimal places of 25.000 is rounded and the value is thus 25.00.
•
The formula that 25.00
×
100 = 2500 is converted to the binary digit and
b'0000,1001,1100,0100 (H'09C4) is set to ER0.
(b) Flash pass/fail parameter (FPFR: general register R0L of CPU)
This is the return value indicating the initialization result.
Bit
:
7
6
5
4
3
2
1
0
0
0
0
0
0
0
FQ
SF
Initial value :
—
—
—
—
—
—
—
—
R/W
:
—
—
—
—
—
—
R/W
R/W
Bits 7 to 2—Reserved: Return 0.
Bit 1—Frequency Error Detect (FQ): Returns the check result whether the specified operating
frequency of the CPU is in the range of the supported operating frequency.
Bit 1
FQ
Description
0
Setting of operating frequency is normal
1
Setting of operating frequency is abnormal
Bit 0—Success/Fail (SF): Indicates whether initialization is completed normally.
Bit 0
SF
Description
0
Initialization is ended normally (no error)
1
Initialization is ended abnormally (error occurs)
Содержание H8S/2318 series
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