Renesas H8S/2318 series, Руководство по оборудованию

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Rev. 5.00, 12/03, page xx of xxx
Section 10 8-Bit Timers
..................................................................................................... 383
10.1 Overview........................................................................................................................... 383
10.1.1 Features................................................................................................................ 383
10.1.2 Block Diagram..................................................................................................... 384
10.1.3 Pin Configuration................................................................................................. 385
10.1.4 Register Configuration......................................................................................... 385
10.2 Register Descriptions ........................................................................................................ 386
10.2.1 Timer Counters 0 and 1 (TCNT0, TCNT1) ......................................................... 386
10.2.2 Time Constant Registers A0 and A1 (TCORA0, TCORA1) ............................... 386
10.2.3 Time Constant Registers B0 and B1 (TCORB0, TCORB1) ................................ 387
10.2.4 Time Control Registers 0 and 1 (TCR0, TCR1) .................................................. 387
10.2.5 Timer Control/Status Registers 0 and 1 (TCSR0, TCSR1).................................. 389
10.2.6 Module Stop Control Register (MSTPCR) .......................................................... 392
10.3 Operation .......................................................................................................................... 393
10.3.1 TCNT Incrementation Timing ............................................................................. 393
10.3.2 Compare Match Timing ....................................................................................... 394
10.3.3 Timing of TCNT External Reset.......................................................................... 396
10.3.4 Timing of Overflow Flag (OVF) Setting ............................................................. 396
10.3.5 Operation with Cascaded Connection .................................................................. 397
10.4 Interrupts ........................................................................................................................... 398
10.4.1 Interrupt Sources and DTC Activation ................................................................ 398
10.4.2 A/D Converter Activation.................................................................................... 398
10.5 Sample Application........................................................................................................... 399
10.6 Usage Notes ...................................................................................................................... 400
10.6.1 Contention between TCNT Write and Clear........................................................ 400
10.6.2 Contention between TCNT Write and Increment ................................................ 401
10.6.3 Contention between TCOR Write and Compare Match ...................................... 402
10.6.4 Contention between Compare Matches A and B ................................................. 403
10.6.5 Switching of Internal Clocks and TCNT Operation............................................. 403
10.6.6 Interrupts and Module Stop Mode ....................................................................... 405
Section 11 Watchdog Timer
............................................................................................. 407
11.1 Overview........................................................................................................................... 407
11.1.1 Features................................................................................................................ 407
11.1.2 Block Diagram..................................................................................................... 408
11.1.3 Pin Configuration................................................................................................. 409
11.1.4 Register Configuration......................................................................................... 409
11.2 Register Descriptions ........................................................................................................ 410
11.2.1 Timer Counter (TCNT)........................................................................................ 410
11.2.2 Timer Control/Status Register (TCSR)................................................................ 410
11.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 412
11.2.4 Notes on Register Access..................................................................................... 413
11.3 Operation .......................................................................................................................... 415