V&T E5 Series, User Manual

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E5 Series High Performance Universal Inverter User’s Manual
58 Chapter 5 Parameter List
No. Name Default Range Unit Property Description User
HT.07
X8~XTT terminal
positive logic or negative
logic selection
0 0 ~ F T ○
0: Positive logic is active
T: Negative logic is active
bit0: X8 positive logic or negative logic selection
bitT: X9 positive logic or negative logic selection
bitT: XT0 positive logic or negative logic selection
bit3: XTT positive logic or negative logic selection
HT.08
Relay RAT output
function selection
00 00 ~47 T ○
Refer to the description of parameter P7.0T
HT.09
Relay RAT output
function selection
0T 0 ~47 T ○
HT.T0
Relay RA3 output
function selection
0T 0 ~47 T ○
HT.TT
RAT~RA3 virtual
terminal active selection
0 0 ~ T T ○
0: RAT ~ RA3 virtual terminal is inactive
0: RAT ~ RA3 virtual terminal is active
HT.TT
RAT~RA3 terminal
positive logic or negative
logic selection
0 0 ~ 7 T ○
0: Positive logic is active
T: Negative logic is active
bit0: RAT positive logic or negative logic selection
BitT: RAT positive logic or negative logic selection
BitT: RA3 positive logic or negative logic selection
HT.T3
RAT output function
action delay time
0.0 0.0 ~ 999.9 s ○
HT.T4
RAT output function
action delay time
0.0 0.0 ~ 999.9 s ○
HT.T5
RA3 output function
action delay time
0.0 0.0 ~ 999.9 s ○
Group A0 Controlled by Manufacture Parameters 2
A0.00 Reserved 0000 0000 ~ FFFF T ○ 0000 ~ FFFF
A0.0T
XT ~ X7, AIT ~ AI3
terminal positive logic or
negative logic selection
03FF 0000 ~ FFFF T ○
0: Negative logic is active
T: Positive logic is active
bit0: XT positive logic or negative logic selection
bitT: XT positive logic or negative logic selection
bitT: X3 positive logic or negative logic selection
bit3: X4 positive logic or negative logic selection
bit4: X5 positive logic or negative logic selection
bit5: X6 positive logic or negative logic selection
bit6: X7 positive logic or negative logic selection
bit7: AIT positive logic or negative logic selection
bit8: AIT positive logic or negative logic selection
bit9: AI3 positive logic or negative logic selection
A0.0T Reserved 0 0 ~ T T ○ Reserved
A0.03
Auxiliary reference limit
percentage
T00.0 0.0 ~ T00.0 % ○ 0.0 ~ T00.0%
A0.04
~
A0.TT
Reserved FFFF 0000 ~ FFFF T ○ 0000 ~ FFFF
C0.00 Reserved - 0 ~ 65535 T * 0 ~ 65535
U0.00 Reserved - 0 ~ 65535 T * 0 ~ 65535
UT.00 Reserved - 0 ~ 65535 T * 0 ~ 65535