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7.7.16 Module Control n Register 0-51 (MDCTLn)
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PSC Registers
The module control n register 0-41 (MDCTLn) is shown in
and described in
. See
for after reset default module states. It is not possible to change the module states for modules
29 through 38. The states of these modules are taken care of by internal hardware and are primarily for
internal chip infrastructure. Module 39 is reserved and you must not try to change the state of module 39.
It is possible to change the state of other modules: 0-27, 40, and 41.
Figure 7-18. Module Control n Register 0-41 (MDCTLn)
31
16
Reserved
R-0
15
11
10
9
8
5
4
0
Reserved
EMUIHBIE
EMURSTIE
Reserved
NEXT
R-0
R/W- 0
R/W- 0
R-0
R/W- 0
LEGEND: R/W = Read/Write, R = Read; n = value at reset
Table 7-21. Module Control n Register 0-51 (MDCTLn) Field Descriptions
Bit
Field
Value
Description
31-11
Reserved
0
Reserved
10
EMUIHBIE
Interrupt enable for emulation alters module state.
0
Disable interrupt.
1
Enable interrupt.
9
EMURSTIE
Interrupt enable for emulation alters reset.
0
Disable interrupt.
1
Enable interrupt.
8-5
Reserved
0
Reserved
4-0
NEXT
Module next state
0
SwRstDisable state
1h
SyncReset state
2h
Disable state
3h
Enable state
SPRUFX7 – July 2008
Power and Sleep Controller
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