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7.7.5 Module Error Clear Register 0 (mod 0-31) (MERRCR0)
PSC Registers
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The module error clear 0 (mod 0-31) register (MERRCR0) is shown in
and described in
.
Figure 7-7. Module Error Clear Register 0 (mod 0-31) (MERRCR0)
31
0
M0[32]
R-0
LEGEND: R = Read, n = value at reset
Table 7-10. Module Error Clear Register 0 (mod 0-31) (MERRCR0) Field Descriptions
Bit
Field
Value
Description
31-0
M[32]
Clears the interrupt bit set in the corresponding MERRPRO register bit field
and the MDSTAT interrupt bit fields. This pertains to modules 0-31.
0
A write of 0 has no effect.
1
Clears module interrupt.
Power and Sleep Controller
76
SPRUFX7 – July 2008