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Memory Map
Table 4-2. ARM Configuration Bus Access to Peripherals
Address
Accessibility
Region
Start
End
Size
ARM
EDMA
EDMA CC
0x01C0 0000
0x01C0 FFFF
64K
√
√
EDMA TC0
0x01C1 0000
0x01C1 03FF
1K
√
√
EDMA TC1
0x01C1 0400
0x01C1 07FF
1K
√
√
Reserved
0x01C1 0800
0x01C1 9FFF
38K
√
√
Reserved
0x01C1 A000
0x01C1 FFFF
24K
√
√
UART0
0x01C2 0000
0x01C2 03FF
1K
√
√
UART1
0x01C2 0400
0x01C2 07FF
1K
√
√
Timer4/5
0x01C2 0800
0x01C2 0BFF
1K
√
√
Real-time out
0x01C2 0C00
0x01C2 0FFF
1K
√
√
I2C
0x01C2 1000
0x01C2 13FF
1K
√
√
Timer0/1
0x01C2 1400
0x01C2 17FF
1K
√
√
Timer2/3
0x01C2 1800
0x01C2 1BFF
1K
√
√
WatchDog Timer
0x01C2 1C00
0x01C2 1FFF
1K
√
√
PWM0
0x01C2 2000
0x01C2 23FF
1K
√
√
PWM1
0x01C2 2400
0x01C2 27FF
1K
√
√
PWM2
0x01C2 2800
0x01C2 2BFF
1K
√
√
PWM3
0x01C2 2C00
0x01C2 2FFF
1K
√
√
System Module
0x01C4 0000
0x01C4 07FF
2K
√
√
PLL Controller 0
0x01C4 0800
0x01C4 0BFF
1K
√
√
PLL Controller 1
0x01C4 0C00
0x01C4 0FFF
1K
√
√
Power/Sleep Controller
0x01C4 1000
0x01C4 1FFF
4K
√
√
Reserved
0x01C4 2000
0x01C4 7FFF
24K
√
√
ARM Interrupt Controller
0x01C4 8000
0x01C4 83FF
1K
√
√
Reserved
0x01C4 8400
0x01C6 3FFF
111K
√
√
USB OTG 2.0 Regs / RAM
0x01C6 4000
0x01C6 5FFF
8K
√
√
SPI0
0x01C6 6000
0x01C6 67FF
2K
√
√
SPI1
0x01C6 6800
0x01C6 6FFF
2K
√
√
GPIO
0x01C6 7000
0x01C6 77FF
2K
√
√
SPI2
0x01C6 7800
0x01C6 FFFF
2K
√
√
VPSS Subsystem
0x01C7 0000
0x01C7 FFFF
64K
√
√
VPSS Clock Control
0x01C7 0000
0x01C7 007F
128
√
√
Hardware 3A
0x01C7 0080
0x01C7 00FF
128
√
√
Image Pipe (IPIPE)
0x01C7 0100
0x01C7 01FF
256
√
√
Interface
On Screen Display
0x01C7 0200
0x01C7 02FF
256
√
√
Reserved
0x01C7 0300
0x01C7 03FF
256
√
√
Video Encoder
0x01C7 0400
0x01C7 05FF
512
√
√
CCD Controller
0x01C7 0600
0x01C7 07FF
256
√
√
VPSS Buffer Logic
0x01C7 0800
0x01C7 08FF
256
√
√
Reserved
0x01C7 0900
0x01C7 09FF
256
√
√
Image Pipe (IPIPE)
0x01C7 1000
0x01C7 3FFF
12K
√
√
Reserved
0x01C7 4000
0x01CD FFFF
432K
√
√
Multimedia / SD 1
0x01E0 0000
0x01E0 1FFF
8K
√
√
ASP0
0x01E0 2000
0x01E0 3FFF
8K
√
√
ASP1
0x01E0 4000
0x01E0 5FFF
8K
√
√
UART2
0x01E0 6000
0x01E0 63FF
1K
√
√
SPRUFX7 – July 2008
Memory Mapping
31