8.4.18 Interrupt Priority Register 7 (INTPRI7)
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INTC Registers
The interrupt priority register 7 (INTPRI7) is shown in
and described in
Figure 8-22. Interrupt Priority Register 7 (INTPRI7)
31
30
28
27
26
24
23
22
20
19
18
16
Reserved
INT63
Reserved
INT62
Reserved
INT61
Reserved
INT60
R-0
R/W-7
R-0
R/W-7
R-0
R/W-7
R-0
R/W-7
15
14
12
11
10
8
7
6
4
3
2
0
Reserved
INT59
Reserved
INT58
Reserved
INT57
Reserved
INT56
R-0
R/W-7
R-0
R/W-7
R-0
R/W-7
R-0
R/W-7
LEGEND: R/W = Read/Write, R = Read; n = value at reset
Table 8-20. Interrupt Priority Register 7 (INTPRI7) Field Descriptions
Bit
Field
Value
Description
31
Reserved
0
Reserved
30-28
INT63
0-7h
Selects INT63 priority level.
27
Reserved
0
Reserved
26-24
INT62
0-7h
Selects INT62 priority level.
23
Reserved
0
Reserved
22-20
INT61
0-7h
Selects INT61 priority level.
19
Reserved
0
Reserved
18-16
INT60
0-7h
Selects INT60 priority level.
15
Reserved
0
Reserved
14-12
INT59
0-7h
Selects INT59 priority level.
11
Reserved
0
Reserved
10-8
INT58
0-7h
Selects INT58 priority level.
7
Reserved
0
Reserved
6-4
INT57
0-7h
Selects INT57 priority level.
3
Reserved
0
Reserved
2-0
INT56
0-7h
Selects INT56 priority level.
SPRUFX7 – July 2008
Interrupt Controller
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